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FAN73833 -- Half-Bridge Gate-Drive IC
May 2008
FAN73833 Half-Bridge Gate-Drive IC
Features
Floating Channel for Bootstrap Operation to +600V Typically 350mA/650mA Sourcing/Sinking Current Driving Capability for Both Channels Extended Allowable Negative VS Swing to -9.8V for Signal Propagation at VDD=VBS=15V 3.3V and 5V Input Logic Compatible Outputs in Phase with Input Signals Built-in UVLO Functions for Both Channels Built-in Shoot-Through Prevention Circuit Built-in Common-Mode dv/dt Noise Canceling Circuit Internal Dead-Time: 400ns Typical
Description
The FAN73833 is a half-bridge gate-drive IC for driving MOSFETs and IGBTs, operating up to +600V. Fairchild's high-voltage process and common-mode noise canceling technique provide stable operation of high-side driver under high-dv/dt noise circumstances. An advanced level-shift circuit allows high-side gate driver operation up to VS=-9.8V (typical) for VBS=15V. The UVLO circuits for both channels prevent malfunction when VDD and VBS are lower than the specified threshold voltage. Output drivers typically source/sink 350mA/650mA, respectively, which is suitable for all kinds of half- and full-bridge inverters.
Applications
SMPS Motor Drive Inverter Fluorescent Lamp Ballast HID Ballast
8-SOP
Ordering Information
Part Number
FAN73833M FAN73833MX
Package
8-SOP
Operating Temperature Range
-40C to +125C
Eco Status
RoHS
Packing Method
Tube Tape & Reel
For Fairchild's definition of "green" Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.
(c) 2008 Fairchild Semiconductor Corporation FAN73833 * Rev. 1.0.0
www.fairchildsemi.com
FAN73833 -- Half-Bridge Gate-Drive IC
Typical Application Circuit
RBOOT
DBOOT
Up to 600V
VDD
LIN HIN
1 LIN 2 HIN
VB 8 HO 7 CBOOT VS 6 LO 5
3 VDD 4 COM
Load
Figure 1. Application Circuit for Half-Bridge
Internal Block Diagram
8
UVLO
VB
DRIVER
PULSE GENERATOR
NOISE CANCELLER
R S
R Q
7
HO
SCHMITT TRIGGER INPUT
6
HS(ON/OFF)
VS
HIN
2
100K
UVLO SHOOT-THOUGH PREVENTION
LS(ON/OFF)
3 DRIVER
VDD
LIN
1
100K
DEAD TIME { 400ns }
DELAY
5
LO
4
COM
Figure 2. Functional Block Diagram
(c) 2008 Fairchild Semiconductor Corporation FAN73833 * Rev.1.0.0
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FAN73833 -- Half-Bridge Gate-Drive IC
Pin Configuration
LIN HIN VDD COM
1 2 3 4
Figure 3. Pin Configuration (Top View)
FAN73833
8 7 6 5
VB HO VS LO
Pin Definitions
Pin #
1 2 3 4 5 6 7 8
Name
LIN HIN VDD COM LO VS HO VB Logic Input for Low-Side Driver Logic Input for High-Side Driver Low-Side Supply Voltage
Description
Logic Ground and Low-Side Driver Return Low-Side Driver Output High-Side Floating Supply Return High-Side Driver Output High-Side Floating Supply
(c) 2008 Fairchild Semiconductor Corporation FAN73833 * Rev.1.0.0
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FAN73833 -- Half-Bridge Gate-Drive IC
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TA=25C, unless otherwise specified.
Symbol
VS VB VHO VDD VLO VIN COM dVS/dt PD JA TJ TSTG Notes:
Parameter
High-side Offset Voltage High-side Floating Supply Voltage High-side Floating Output Voltage HO Low-side and Logic-fixed Supply Voltage Low-side Output Voltage LO Logic Input Voltage (HIN/LIN) Logic Ground and Low-side Driver Return Allowable Offset Voltage Slew Rate Power Dissipation(1)(2)(3) Thermal Resistance, Junction-to-Ambient Junction Temperature Storage Temperature
Min.
VB-25 -0.3 VS-0.3 -0.3 -0.3 -0.3 VDD-25
Max.
VB+0.3 625.0 VB+0.3 25.0 VDD+0.3 VDD+0.3 VDD+0.3 50 0.625 200 +150
Unit
V V V V V V V V/ns W C/W C C
-55
+150
1. Mounted on 76.2 x 114.3 x 1.6mm PCB (FR-4 glass epoxy material). 2. Refer to the following standards: JESD51-2: Integral circuits thermal test method environmental conditions - natural convection; JESD51-3: Low effective thermal conductivity test board for leaded surface mount packages 3. Do not exceed PD under any circumstances.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
VB VS VDD VHO VLO VIN TA
Parameter
High-side Floating Supply Voltage High-side Floating Supply Offset Voltage Low-side Supply Voltage High-side (HO) Output Voltage Low-side (LO) Output Voltage Logic Input Voltage (HIN/LIN) Ambient Temperature
Min.
VS+15 6-VDD 15 VS COM COM -40
Max.
VS+20 600 20 VB VDD VDD +125
Unit
V V V V V V C
(c) 2008 Fairchild Semiconductor Corporation FAN73833 * Rev.1.0.0
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FAN73833 -- Half-Bridge Gate-Drive IC
Electrical Characteristics
VBIAS (VDD, VBS)=15.0V, and TA=25C, unless otherwise specified. The VIN and IIN parameters are referenced to COM. The VO and IO parameters are referenced to VS and COM and are applicable to the respective outputs HO and LO.
Symbol
IQBS IQDD IPBS IPDD ILK VDDUV+ VBSUV+ VDDUVVBSUVVDDUVH VBSUVH VOH VOL IO+ IOVS
Parameter
Quiescent VBS Supply Current Quiescent VDD Supply Current Operating VBS Supply Current Operating VDD Supply Current Offset Supply Leakage Current VDD and VBS Supply Under-Voltage Positive-going Threshold VDD and VBS Supply Under-Voltage Negative-going Threshold VDD and VBS Supply Under-Voltage Lockout Hysteresis High-level Output Voltage, VBIAS-VO Low-level Output Voltage, VO Output High Short-Circuit Pulse Current(4) Output Low Short-Circuit Pulse Current(4) Allowable Negative VS Pin Voltage for IN Signal Propagation to HO Logic "1" Input Voltage Logic "0" Input Voltage Logic "1" Input Bias Current Logic "0" Input Bias Current Input Pull-down Resistance VIN=5V VIN=0V IO=20mA
Condition
VIN=0V or 5V VIN=0V or 5V fIN=20kHz, rms Value fIN=20kHz, rms Value VB=VS=600V
Min.
Typ.
35 80 420 420
Max.
100 200 750 750 10
Unit
A A A A A
SUPPLY CURRENT SECTION
POWER SUPPLY SECTION 8.2 7.2 9.2 8.3 0.9 10.1 9.3 V V V
GATE DRIVER OUTPUT SECTION 1.0 0.6 VO=0V, VIN=5V with PW<10s VO=15V, VIN=0V with PW<10s 250 500 350 650 -9.8 -7.0 V V mA mA V
LOGIC INPUT SECTION VIH VIL IIN+ IINRPD Note: 4. This parameter is guaranteed by design. 2.5 1.0 50 100 100 2.0 V V A A K
Dynamic Electrical Characteristics
VBIAS (VDD, VBS)=15.0V, VS=COM, CL=1000pF, and TA = 25C, unless otherwise specified.
Symbol
tON tOFF tR tF DT
Parameter
Turn-on Propagation Delay Time Turn-off Propagation Delay Time Turn-on Rising Time Turn-off Falling Time Dead Time VS=0V VS=0V
Conditions
Min.
Typ.
150 140 50 30
Max.
270 250 100 80 580
Unit
ns ns ns ns ns
330
450
(c) 2008 Fairchild Semiconductor Corporation FAN73833 * Rev.1.0.0
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FAN73833 -- Half-Bridge Gate-Drive IC
Typical Characteristics
300 250
300 250
tOFF [ns]
tON [ns]
200 150 100 50 0 -40
200 150 100 50 0 -40
-20
0
20
40
60
80
100
120
-20
0
20
40
60
80
100
120
Temperature [C]
Temperature [C]
Figure 4. Turn-on Propagation Delay vs. Temp.
Figure 5. Turn-off Propagation Delay vs. Temp.
120 100
80
60
tR [ns]
tF [ns]
-20 0 20 40 60 80 100 120
80 60 40
40
20 20 0 -40 0 -40
-20
0
20
40
60
80
100
120
Temperature [C]
Temperature [C]
Figure 6. Turn-on Rise Time vs. Temp.
Figure 7. Turn-off Fall Time vs. Temp.
700
100
600
80
DT [ns]
500
IIN+[A]
-20 0 20 40 60 80 100 120
60
400
40
300
20
200 -40
0 -40
-20
0
20
40
60
80
100
120
Temperature [C]
Temperature [C]
Figure 8. Dead Time vs. Temp.
Figure 9. Logic Input High Bias Current vs. Temp.
(c) 2008 Fairchild Semiconductor Corporation FAN73833 * Rev.1.0.0
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FAN73833 -- Half-Bridge Gate-Drive IC
Typical Characteristics (Continued)
200
100
160
80
IQDD [A]
120
IQBS [A]
-20 0 20 40 60 80 100 120
60
80
40
40
20
0 -40
0 -40
-20
0
20
40
60
80
100
120
Temperature [C]
Temperature [C]
Figure 10. Quiescent VDD Supply Current vs. Temp.
Figure 11. Quiescent VBS Supply Current vs. Temp.
750
750
600
600
IPDD [A]
450
IPBS [A]
-20 0 20 40 60 80 100 120
450
300
300
150
150
0 -40
0 -40
-20
0
20
40
60
80
100
120
Temperature [C]
Temperature [C]
Figure 12. Operating VDD Supply Current vs. Temp.
Figure 13. Operating VBS Supply Current vs. Temp.
10.0
9.2
9.6
8.8
VDDUV+ [V]
VDDUV- [V]
9.2
8.4
8.0
8.8 7.6 8.4 -40 -20 0 20 40 60 80 100 120 7.2 -40 -20 0 20 40 60 80 100 120
Temperature [C]
Temperature [C]
Figure 14. VDD UVLO+ vs. Temp.
Figure 15. VDD UVLO- vs. Temp.
(c) 2008 Fairchild Semiconductor Corporation FAN73833 * Rev.1.0.0
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FAN73833 -- Half-Bridge Gate-Drive IC
Typical Characteristics (Continued)
10.0
9.2
9.6
8.8
VBSUV+ [V]
VBSUV- [V]
-20 0 20 40 60 80 100 120
9.2
8.4
8.0
8.8 7.6 8.4 -40 7.2 -40 -20 0 20 40 60 80 100 120
Temperature [C]
Temperature [C]
Figure 16. VBS UVLO+ vs. Temp.
Figure 17. VBS UVLO- vs. Temp.
1.0
0.6 0.5 0.4
0.8
VOH [V]
VOL [V]
-20 0 20 40 60 80 100 120
0.6
0.3 0.2
0.4
0.2
0.1 0.0 -40
0.0 -40
-20
0
20
40
60
80
100
120
Temperature [C]
Temperature [C]
Figure 18. High-Level Output Voltage vs. Temp.
Figure 19. Low-Level Output Voltage vs. Temp.
3.0 2.5 2.0
3.0 2.5 2.0
VIH [V]
1.5 1.0 0.5 0.0 -40
VIL [V]
-20 0 20 40 60 80 100 120
1.5 1.0 0.5 0.0 -40
-20
0
20
40
60
80
100
120
Temperature [C]
Temperature [C]
Figure 20. Logic High Input Voltage vs. Temp.
Figure 21. Logic Low Input Voltage vs. Temp.
(c) 2008 Fairchild Semiconductor Corporation FAN73833 * Rev. 1.0.0
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FAN73833 -- Half-Bridge Gate-Drive IC
Typical Characteristics (Continued)
0 -2 -4
VS [V]
-6 -8 -10 -12 -14 -40
-20
0
20
40
60
80
100
120
Temperature [C]
Figure 22. Allowable Negative VS Voltage vs. Temp.
(c) 2008 Fairchild Semiconductor Corporation FAN73833 * Rev. 1.0.0
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FAN73833 -- Half-Bridge Gate-Drive IC
Application Information
1. Protection Function
1.1 Under-Voltage Lockout (UVLO)
The high- and low-side drivers include under-voltage lockout (UVLO) protection circuitry for each channel that monitors the supply voltage (VDD) and bootstrap capacitor voltage (VBS) independently. It can be designed to prevent malfunction when VDD and VBS are lower than the specified threshold voltage. The UVLO hysteresis prevent chattering during power supply transitions.
LIN
50% 50% 50%
2. Switching Time Diagram
More than dead time
More than dead time
HIN
tOFF 90%
50%
50% tOFF 90% tON 10% tOFF 90%
1.2 Shoot-Through Prevention Function
The shoot-through prevention circuitry monitors the highand low-side control inputs. It can be designed to prevent outputs of high and low side from turning on at same time, as shown Figure 23 and 24.
LO
tON
HO
10%
Figure 25. Switching Time Definition
HIN
LIN
Shoot-Through Prevent
HO
After DT
LO
After DT
Figure 23. Waveforms for Shoot-Through Prevention
HIN
LIN
Shoot-Through Prevent
HO
After DT
LO
Figure 24. Waveforms for Shoot-Through Prevention
(c) 2008 Fairchild Semiconductor Corporation FAN73833 * Rev. 1.0.0
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FAN73833 -- Half-Bridge Gate-Drive IC
Physical Dimensions
.
5.00 4.80 3.81
8 5
A
0.65
B
6.20 5.80
4.00 3.80
1.75 5.60
PIN ONE INDICATOR
1
4
1.27
0.25
M
(0.33)
CBA
1.27
LAND PATTERN RECOMMENDATION
0.25 0.10 1.75 MAX
C
SEE DETAIL A
0.25 0.19
0.10 C
R0.10 R0.10
0.51 0.33 0.50 x 45 0.25
OPTION A - BEVEL EDGE
GAGE PLANE
0.36
OPTION B - NO BEVEL EDGE
NOTES: UNLESS OTHERWISE SPECIFIED
8 0 0.90 0.406
pdip8_dim.pdf
SEATING PLANE
(1.04)
DETAIL A
SCALE: 2:1
A) THIS PACKAGE CONFORMS TO JEDEC MS-012, VARIATION AA, ISSUE C, B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS. D) LANDPATTERN STANDARD: SOIC127P600X175-8M. E) DRAWING FILENAME: M08AREV13
Figure 26. 8-Lead Small Outline Package (SOP)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/
(c) 2008 Fairchild Semiconductor Corporation FAN73833 * Rev.1.0.0
www.fairchildsemi.com 11
FAN73833 -- Half-Bridge Gate-Drive IC
(c) 2008 Fairchild Semiconductor Corporation FAN73833 * Rev. 1.0.0
www.fairchildsemi.com 12

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